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Technisys Modular Design BERT- Bit Error Test Generator 701125 Angebot

Modular Design

 

 
 

BERT- Bit Error Test Generator 701125

Modular Bit Error Tester

Description:
This modular design provides unframed, high speed, serial binary output ranging from T1 to STM-1 rates. Outputs can be encoded with applicable zero suppression techniques.

Signal levels include differential and single ended AMI, CMI, ECL, PECL, RS422 and LVDS levels for copper interface and STM-1 (OC3) fiber optic interface. All electrical I/O is through rear panel concentric twinaxial connectors or industry standard BNC connectors. The SFP I/O can be electrical, if Infiniband or Fiber Channel device is installed. NRZ interfaces are all differential pairs. Fiber I/O is through LC connectors and a SFP transceiver.

This module is designed for use in Technisys Universal Chassis, PN 701073

Features:
Cost effective BERT for high speed digital systems.
Provides Unframed PRBS Generated output at multiple rates from T1 through STM-1.
Multiple output formats/levels available: ECL, PECL, LVDS (RS644), RS422, AMI, CMI, fiber optic
All controls and indicators are located on the front panel
All I/O on rear panel
Test patterns include R3, R7 and R15
Individual front panel DATA/CLOCK INVERT control

Options:
Stand alone, cost effective BERT for high speed digital systems.
PN 701182-1

 
 
 
 
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