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Bittware XUPSVH | Ultra high-speed network interface | Xilinx UltraScale+ FPGA | 2x or 4x 100GbE | 460 GBps memory bandwidth | 8 GB

The BittWare XUPSVH PCIe accelerator board built with a Xilinx UltraScale+ VU33P/35P FPGA is well suited to high density data center applications that demand high memory bandwidths.

The UltraScale+ avoids I/O bottlenecks with integrated High Bandwidth Memory (HBM2) tiles on the FPGA that support up to 8 GBytes of memory at 460 GBytes/sec.

The UltraScale+ VU37P offers up to 1.9 million logic elements. This power density makes thermal management difficult, but Bittware solves this problem  with the Spider platform for large FPGA loads.

Xilinx UltraScale+ Low Profile PCIe Board (Gen1 Gen2 Gen3 x16 lane, or x8 Gen4)

Spider Platform

The XUPSVH is designed with BittWare’s Spider platform, which is a low-profile PCIe platform optimized for thermal performance. The Spider platform combines a low-profile PCIe form-factor for high density, the ability to run larger loads, and a robust passive heatsink option designed for servers.

High-Speed Networking and I/O

The XUPSVH is enabled for high-speed networking with up to two front panel QSFP+ cages, each supporting 40/100GbE or four 10/25GbE channels.

Serial expansion is available through two UltraPort SlimSAS connectors (16x 24Gbps) that can be connected to a second PCIe interface, another XUPVVH, or other devices, including IBM’s POWER9 via OpenCAPI.

A utility header provides a 1GbE interface, a PPS input, and a USB interface for debug and programming support.

Memory

The board’s flexible memory configuration includes two DIMM sites that support DDR4 SDRAM and QDR. Memory card options include up to 128 GBytes of DDR4 with optional error-correcting codes (ECC) or up 576 Mbits QDR-II+ (2x 288Mbit banks x18).

The board also features flash memory for FPGA images.

Board Management Controller

This boards‘s advanced system monitoring subsystem features a Board Management Controller (BMC), which accepts Intelligent Platform Management Interface (IPMI) messaging protocol commands.

The BMC features include control of power and resets, monitoring of board sensors, FPGA boot loader, voltage overrides, configuration of programmable clocks, access to I2C bus components, field upgrades, and IPMI messaging.

Access to the BMC is via PCIe or USB. BittWare’s BittWorks II Toolkit also provides utilities and libraries for communicating with the BMC components at a higher, more abstract level, allowing developers to remotely monitor the state of the board.

BittWorks II Toolkit

BittWare offers complete software support for this card with its BittWorks II software tools. The BittWorks II Toolkit serves as the main interface between the BittWare board and the host system. The Toolkit includes drivers, libraries, utilities, and example projects for accessing, integrating, and developing applications for the BittWare board.

FPGA Example Projects

BittWare offers FPGA example projects to provide FPGA board support IP and integration for its UltraScale+ boards. The example projects easily integrate with the Xilinx Vivado tools and illustrate how to move data between the board’s different interfaces. All examples are available for download on BittWare’s developer website.

Bittware XUPSVH accelerator diagram of the low-profile PCIe card showing its hardware components and key features.
Hardware accelerator diagram: Bittware XUPSVH with 2 QSFP-DD cages (one is optional with full height heat sink).

Product Data

BittWare XUPSVH PCIe accelerator board with a Xilinx UltraScale VU33P/35P FPGA and integrated 8 GBytes and 460 Gbps High Bandwidth Memory for data center applications.
XUPSVH PCIe accelerator board with a Xilinx UltraScale+ VU33P/35P FPGA.
BittWorks II Toolkit include BwMonitor app provides a view into the board management capabilities like live board power and temperature display of BittWare hardware.
BwMonitor is a part of the BittWorks II Toolkit: provides live board power and temperature display of BittWare hardware.

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