Kaya CoaXPress FPGA IP cores, Host and Device Side Intellectual Property

Kaya Instruments provides CoaXPress Intellectual Property FPGA cores for host and device side cameras and frame grabbers. The CXP IP cores are compatible with a wide range of FPGAs from Xilinx and Intel. The Kaya CXP IP cores are available as an encrypted netlist or as open source. CoaXPress Version 1, running at 6.26 Gbps, and the new CXP2 standard at 12.5 Gpbs are both supported.

Host-Side Frame Grabber and Device-Side Camera CXP IP Cores

KAYA Instruments’ CXP Intellectual Property is a high performance Multi-link IP Core for rate-intensive, high-throughput video applications. The host and device IP cores incorporates a friendly streaming interface with a highly configurable pixel packer for glueless connection to imaging sensors or user logic. Avalon and AXI4 are also integrated.

Applications include high speed, high definition, and panoramic cameras, defense remote systems, automotive surround view systems, surveillance, and robotic vision, and as an upgrade path for legacy coax systems.

Supported FPGAs, and list of FPGA IP Cores, for CoaXPress CXP

Supported FPGAs for the Kaya CXP IP Core include all all Xilinx 7, Ultrascale and Ultrascale+ series including Artix 7, Kintex 7, Virtex 7 and Zinq 7000. Supported Intel FPGAs are the Cyclone V, Cyclone 10, Arria V GX, Arria V GZ, Arria 10, Stratix IV, Stratix V and Stratix 10. The PolarFire from MicroSemi is also supported.

CoaXPress Version 1 6,25 Gbps CXP IP Cores list:

CoaXPress Version 2 12,5 Gbps CXP2 IP Cores list:

Product Data

Kaya Instruments Host CoaXPress FPGA IP Core accelerator diagram showing hardware elements.
Hardware block diagram: Host CXP FPGA IP Core.
Kaya Instruments Device CXP FPGA IP Core accelerator diagram showing key components.
Hardware block diagram: Device CXP FPGA IP Core.