
Bittware 520NX | Compute Acceleration of Demanding AI | Stratix 10 NX2100 | Integrated 8GB HBM2 | 600 Gbps
The Bittware 520NX PCIe FPGA Accelerator Card has 8GB HBM2 and a Stratix 10 NX2100 FPGA which is AI-optimized for high-bandwidth, low-latency artificial intelligence.
This revolutionary accelerator delivers a unique combination of capabilities needed to implement low latency and larger AI models:
- High-performance AI Tensor Blocks: 143 INT8 TOPS
- Deep Near-Compute Memory: up to 8GB of HBM2
- High-Bandwidth Networking: up to 600Gbps board-to-board bandwidth
Features
- Intel Stratix 10 NX2100
- 8GB of 3D stacked HBM2
- AI Tensor Blocks
- The 520NX is a variant of the 520N-MX with a Stratix 10 NX FPGA instead of MX.
This board can be customized.
Specifications
- FPGA: Intel Stratix 10 NX2100 in an F2597 package
- 8GBytes on-chip High Bandwidth Memory (HBM2) DRAM, 410 GB/s (speed grade 2)
- Core speed grade -2: I/O speed grade -2
- On-board Flash
- 2Gbit Flash memory for booting FPGA
- External memory
- 2x 288-pin DIMM slots each fitted with 16GB modules by default, i.e., 32GB total on board (options up to 256GB total)
- Contact us for QDR-II+ & Intel Optane (3D-Xpoint) DIMM options
- Host interface
- x16 Gen3 interface direct to FPGA, connected to PCIe hard IP
- QSFP cages
- 4 QSFP28 cages on front panel connected directly to FPGA via 16 transceivers
- User programmable low jitter clocking supporting 10/25/40/100GbE
- Each QSFP28 can be independently clocked
- Jitter cleaner for network recovered clocking
- 2 QSFP28s have available 100GbE MAC hard IP
- OCuLink
- 2x edge connectors (A, B) @ 12.5G per lane (default); each supports PCIe Gen 3 x8 hard IP, GPIO, and PCIe master and optional input clocking
- 2x inner connectors (C, D) @ 25G per lane (optional); 1x 100GbE MAC hard IP per OCuLink
- Board Management Controller
- Voltage, current, temperature monitoring
- Power sequencing and reset
- Field upgrades
- FPGA configuration and control
- Clock configuration
- Low bandwidth BMC-FPGA comms with SPI link
- USB 2.0
- PLDM support
- Voltage overrides
- Cooling
- Standard: double-width active heatsink (with fan)
- Optional: double-width passive heatsink
- Optional: double-width liquid cooling
- Electrical
- On-board power derived from 12V PCIe slot & two AUX connectors (one 8-pin, one 6-pin)
- Power dissipation is application dependent
- Typical max power consumption 225W
- Environmental
- Operating temperature: 5°C to 35°C
- Quality
- Manufactured to IPC-A-610-Class 2
- RoHS compliant
- CE, FCC & ICES approvals
- Form factor
- Standard-height PCIe dual-slot board
- 4.376 x 10.5 inches (111 x 266.7 mm)
- Development Tools
- FPGA development: BIST - Built-In Self-Test for CentOS 7 provided with source code (pinout, gateware, PCIe driver & host test application)
- Application development: Supported design flows - Quartus Prime Pro (HDL, Verilog, VHDL, etc.)
Product Data