BittWare A5PL, Intel Arria V GZ, 2x QSFP – Sky Blue Microsystems GmbH

BittWare A5PL | Intel Arria V GZ FPGA | 8GB | Dual QSFP for 2x 40GigE

BittWare's A5-PCIe-L (A5PL) is a low-profile PCIe x8 card based on the Intel Arria V GZ FPGA. The high-performance, power- and cost-efficient Arria V GZ provides a high level of system integration and flexibility for I/O, routing, and processing. Up to 8 GBytes of on-board memory includes DDR3, QDRII/II+, or RLDRAM3. Two front-panel QSFP+ cages allow two 40GigE or eight 10GigE interfaces. The A5PL also features a Board Management Controller (BMC) for advanced system monitoring, which greatly simplifies platform management. All of these features combine to make the A5PL a versatile and efficient solution for network processing, security, broadcast, and signals intelligence applications.

The 28nm Arria V family of FPGAs deliver optimal performance, power, and cost efficiency for mid-range applications. The Arria V GZ variant, which is featured on the A5PL, offers the highest bandwidth of the Arria V FPGAs. The Arria V GZ provides Gen3 PCIe x8 via a hard IP block and features 16 full-duplex transceivers with data rates up to 12.5 Gbps, and up to 450K equivalent LEs.

The board supports timestamping and synchronization with optional SMA connectors on the front panel for a 1 PPS and reference clock input.* A tunable, high accuracy, temperature compensated oscillator (TCXO) and a programmable clock synthesizer (Si5338) provide sophisticated timing and clocking options. IP is also available for IEEE 1588 Precision Time Protocol (PTP).

Intel Arria V GZ Low Profile PCIe Board with Dual QSFP+ and DDR3, QDRII+, or RLDRAM3

High-Speed Networking and I/O

The A5PL provides a variety of interfaces for high-speed serial I/O as well as debug support. Two QSFP+ cages are available on the front panel, each supporting 40GigE or four 10GigE channels using optical transceivers as well as passive copper cabling up to 8 meters. The QSFP+ cages can optionally be adapted for SFP+.

The Gen3 x8 PCIe interface provides 8 SerDes lanes to the Arria V GZ FPGA. A USB 2.0 interface and an optional JTAG connector are available for debug and programming support.

Memory

The A5PL features an extremely flexible memory configuration, with a SODIMM site that supports DDR3 SDRAM, RLDRAM3, and QDRII+. Memory card options include the following: up to 8 GBytes of DDR3 with optional error-correcting codes (ECC); up to 72 MBytes QDRII+ (2 banks x18); or up to 512 MBytes RLDRAM3 (2 banks x18). Additional on-board memory includes flash memory for storing multiple FPGA images. An on-board PROM provides access to the board’s MAC ID.

Board Management Controller

This boards’s advanced system monitoring subsystem features a Board Management Controller (BMC), which accepts Intelligent Platform Management Interface (IPMI) messaging protocol commands.

The BMC features include control of power and resets, monitoring of board sensors, FPGA boot loader, voltage overrides, configuration of programmable clocks, access to I2C bus components, field upgrades, and IPMI messaging.

Access to the BMC is via PCIe or USB. BittWare’s BittWorks II Toolkit also provides utilities and libraries for communicating with the BMC components at a higher, more abstract level, allowing developers to remotely monitor the state of the board.

BittWorks II Toolkit

BittWare offers complete software support for this card with its BittWorks II software tools. The BittWorks II Toolkit serves as the main interface between the BittWare board and the host system. The Toolkit includes drivers, libraries, utilities, and example projects for accessing, integrating, and developing applications for the BittWare board.

FPGA Development Kit

BittWare’s FPGA DevKit provides FPGA board support IP and integration for BittWare’s Altera FPGA-based boards. The FDK includes FPGA components that provide preconfigured physical interfaces, infrastructure, and examples, drastically cutting development time and easily integrating into existing FPGA development environments.

Working example projects are available for each board which illustrate how to move data between the board’s different interfaces. Supported interfaces include DDR4, DDR3, DDR2, QDR2/+, PCIe, 10GbE, LVDS, SerDes, and Double Data Rate I/O. All example projects are available on BittWare’s Developer Site.

BittWare Firmware and Financial Solutions Partners

BittWare offers firmware for the Stratix V FPGA on the S5 family PCIe boards, targeted specifically for high frequency trading applications. BittWare’s FPGA Development Kit provides a solid base for your financial application, including the following:

BittWare has also partnered with several companies to offer solutions for financial acceleration:

BittWare A5PL accelerator diagram showing key hardware elements e.g. 2x QSFP-plus cages on front panel connected to FPGA via 8 SerDes supporting 40GigE / 4 10GigE.
Hardware accelerator diagram: BittWare A5PL with dual QSFP+ cages for 2x 40GigE or 8x 10GigE.

Product Data

BittWare A5PL is a low profile PCIe slot card with Intel Arria V GZ FPGA supporting up to 8 GB of DDR3 SDRAM with ECC, 512 MB RLDRAM3, 72 MB QDRII-plus.
A5PL is a half-height / half-length PCIe slot card with Intel Arria V GZ FPGA.
BittWorks II Toolkit include BwMonitor app provides a view into the board management capabilities like live board power and temperature display of BittWare hardware.
BwMonitor is a part of the BittWorks II Toolkit: provides live board power and temperature display of BittWare hardware.